Instruction streams, e.g., instruction steams for microarchitectures, are vulnerable and if they exhibit irregularities or if they are manipulated, severe damage may be caused.
The manipulation or, for example, an irregular property, of an executed instruction stream can be detected by implementing a security functionality called instructions stream signature. The Instruction Stream Signature (ISS) provides strong integrity protection of the program flow.
In the state of the art, the stream signature has to be tested by a dedicated software/hardware test today. According to the state of the art, a dedicated software or hardware test is executed, which generates an alarm, if the dedicated software or hardware test indicates an irregularity.
Moreover, in the state of the art, a dedicated SW- or HW-test can only generate alarm conditions when executed and that they can't prevent the execution of critical system operations. This kind of tests can be first corrupted or prevented e.g. by manipulation of the instruction execution and second can only guarantee the correct program flow at the time when the test is executed. Critical system operations before and after the SW/HW signature alarm test are not protected or prevented.
It would therefore be desirable, if improved techniques would be provided for instruction stream protection.